1. Field of the Invention
The present invention relates to a magnetic bubble memory equipment which allows a plurality of access requests to be made with access time required therefor being significantly reduced.
2. Description of the Prior Art
In data processing systems equiped with a rotation type auxiliary memory or storage device (such as magnetic drum, magnetic disk or the like), effort has been made to reduce the time required for making access to the auxiliary memory device by adopting a control method compatible with features or specifications of the access device as used in the auxiliary memory device. For example, in the case of an electronic exchange system in which a magnetic drum device is employed for the auxiliary memory device, a plurality of the access requests to the magnetic drum generated sequentially in accordance with a call processing program are adapted to be processed during a single revolution of the magnetic drum by re-arranging the sequence of the access requests in view of the rotating direction of the drum with the aid of a drum control program instead of processing the access requests on the one-by-one basis in accordance with the order in which the access requests are produced, with a view to reducing the effective access time.
In order to have a better understanding of the invention, description will be first made to conventional access systems by referring to FIGS. 1 to 5.
Referring to FIG. 1 which is a schematic block diagram showing a general arrangement of a data processing system incorporating a magnetic storage drum, reference numeral 1 denotes a central processor unit (CPU) which constitutes the heart of the system for executing a program which is stored in a main memory equipment (MM) 2 together with data to be processed. Data transfer between the central processor unit or CPU1 and peripheral input/output units such as a magnetic drum equipment (MD) 4 serving as an auxiliary memory device and a typewriter (TYP) 5 serving as a man-machine communication interface is effected through a data channel equipment (DCH) 3.
Next, referring to FIG. 2 which illustrates an operation principle of a magnetic drum equipment, data are stored in the magnetic peripheral surface of the storage drum which is assumed to be rotated in the direction indicated by an arrow. Data are read out from or written in to the magnetic surface layer of the drum through magnetic heads 10.sub.1 to 10.sub.n at circumferential tracks 11.sub.1 to 11.sub.n each of which is assigned with an address referred to as the track address. On the other hand, each track consists of a plurality of memory locations each for storing a predetermined number of bits. The memory locations are also allotted with respective location addresses.
It is now assumed that an access request for writing-in to the magnetic drum equipment 4 takes place in the course of execution of a call processing program in the central processor unit 1. In such case, the central processor unit 1 provides two commands such as shown in FIG. 3 in the main memory equipment 2 under the control of a magnetic drum control program. The instruction to the magnetic drum equipment 4 for commanding a sequence of write-in or read-out operations is usually constituted by two commands, i.e. a first command CSL (Control Search Location Command) for initiating the search and matching of address of memory location in the magnetic drum memory at which data to be transferred are stored or read out and a second command WRITE or READ for designating the write-in or read-out operation. In accordance with the magnetic drum control program, the central processor unit 1 executes input/output start instruction and gives a command to the data channel equipment 3 to initiate the transfer of the above set of commands. In response thereto, the data channel equipment 3 transfers at first the first command CSL. More specifically, track address and location address commands are transmitted to the magnetic drum memory 4, which then initiates address matching as to whether the commanded addresses are accessible at that moment and simultaneously signals to the data channel equipment 3 the completed reception of the address commands. The data channel equipment 3 will then send out the succeeding command (write-in command WRITE in the case of the described example) to the magnetic drum memory 4 for preparation of executing the write-in (or read-out) operation. After the completion of the address matching, the write-in operation is performed at the magnetic drum memory equipment 4 in accordance with the write-in command WRITE. It is command in practice that the magnetic drum control program is so set up that the magnetic drum memory 4 is accessed periodically, whereby a plurality of access requests generated during a single period are sequentially processed under commands of the single input/output start instruction. For example, it is assumed that the access requests A, B, C and D have been generated during a single period in this order. In such case, a command set shown in FIG. 4 will be prepared for the main memory equipment. When the memory locations on the rotating magnetic drum as designated by the address commands corresponding to the acess requests A, B, C and D are positioned in the order of d, b, c and a as shown in FIG. 2, respectively, then the access request A will be processed during the first rotation of the magnetic drum, while the access requests B and C are processed during the second rotation with the access request D processed finally during the third rotation of the magnetic drum, on the assumption that the access requests A, B, C and D are processed in the order as they are generated. As the result, the time required for processing the four access requests in response to the single input/output start command will amount to the time duration greater than that required for twice rotations of the magnetic drum and smaller than that required for three rotations of the drum. In order to reduce the time required for such processing, the magnetic drum control is so programmed that the commands for the access requests are re-arranged in respect of the requestiall order thereof in such a manner that the heads associated with the access requests may reach the respective addressed memory locations sequentially during a single rotation of the magnetic drum, as is well known in the art. For example, in the case of the above assumed example, the access requests A, B, C and D are re-arranged in the order of D, B, C and A and processed during the single rotation of the magnetic drum under the command of the input/output start instruction. In this manner, a plurality of access requests (four requests in the illustrated example) can be executed during a single rotation of the magnetic drum.
Lately, magnetic bubble memory equipments which operates by making use of lately discovered magnetic phenomenon for storage of binary information or data have been developed and attract attention as a novel memory device which can be employed in place of the conventional magnetic drum equipments, magnetic disk equipments or the like.
The magnetic bubble memory device may be regarded as a variety of rotation type auxiliary memory equipment in the same sense as the magnetic drum equipment in respect of the accessing system. However, the magnetic bubble memory equipment differs from the magnetic drum memory with regard to the address assignment although the magnetic bubble memory is also provided with sequential addresses, as will be described below by referring to FIGS. 6 to 8.
In general, the magnetic bubble memory equipment is composed of a plurality of bubble chips, in each of which an arrangement of a major loop and minor loops is provided. As is known, the major and minor loop arrangement can be represented as shown in FIG. 6 and allotted with addressed as indicated therein. More particularly, each of the minor loops 12-0 to 12-.beta. is assigned with minor loop addresses P.sub.o to P.sub..alpha. at the same bit positions in common to all the minor loops. The major loop 13 is in contact with all the minor loops at gate positions 14 through which single bits at the identical minor loop addresses (P.sub.o to P.sub..alpha.) can be shifted to the major loop 13 at the same time. The data bits in number of .beta.+1 gated to the major loop 13 are assigned with major loop addresses Q.sub.o to Q.sub..beta. sequentially starting from the leading bit (the lowermost bit as viewed in FIG. 6). The suffix numbers attached to the major loop addresses of the shifted bits correspond to the suffix number of the minor loops in which the corresponding bits have been stored. Additionally, the bubble chips are also allotted with respective chip addresses. In the case of the bubble chip shown in FIG. 6, it will be seen that the chip address No. 0 is allotted. Through these three kinds of addresses, i.e. the minor loop addresses, major loop addresses and the chip addresses, any bit location in a given chip can be designated. For example, the bit location at a point d in FIG. 6 can be designated by a combination of the minor address P.sub.1, major address Q.sub..beta.-1 and the chip address No. 0. Reference numeral 15 denotes a sensor which serves for write-in and read-out operations and is usually composed of separate parts destined for write-in and read-out operation, respectively. These sensor parts may be located at different positions on the major loop 13, although the sensor 15 is illustrated as an integral unit located at the same position for the convenience of description. Arrows 16 indicate the direction in which the stored data bits are moved or shifted in the minor and major loops.
For the description of access operation to the magnetic bubble memory, reference is again made to FIG. 6 on the assumption that the data bit stored at the location d is to be read out by way of example. Under the influence of a rotating magnetic field is applied to the whole bubble chip No. 0, the data bit stored at the location d is caused to be shifted along the minor loop 12-.beta..sub.-1 in the direction indictated by the arrow 16 and reaches the gate position 14 which is then activated to gate the data bit to the major loop 13. At the same time, all the data bits stored in the other minor loops at the identical addresses P.sub.1 are also transferred to the major loop 13. The magnetic bubbles in a train thus transferred to the major loop 13 inclusive of the bubble d are allotted with respective addresses Q.sub.o to Q.sub..beta. and caused to move along the major loop 13 in the direction incicated by the arrow 16 under the influence of the correspondingly rotating magnetic field thereby to pass by the sensor 15 sequentially. When the memory data bubble d now allotted with the major loop address Q.sub..beta.-1 has reached the sensor 15, the memory data located originally at d is read out. The write-in of data bit to the bubble or memory location d is effected in a similar manner. Namely, when the magnetic bubble d passes by the sensor 15, the write-in operation is performed. After the completed read-out or write-in operation to the magnetic bubble d, the latter is caused to further move along the major loop 13 in the direction 16 to the gate position 14 associated with the minor loop 12-.beta..sub.-1. At that time, all the bits originally stored in the other minor loops at the same minor loop addresses P.sub.1 attain the respective gate positions 14, since the number of bits in each of the minor loops is usually selected equal to that of the major loop 13. Thus, all the magnetic bubbles inclusive of the bubble or bit d allotted with the major loop addresses Q.sub.o to Q.sub..beta. are transferred to the respective minor loops through the actions of the respective gates 14 to be stored again in the minor loops at the memory locations designated by the address P.sub.1 . As will be appreciated from the foregoing description on the typical accessing operations to the bubble chip of the major and minor loop arrangement, the location of a bit stored in a minor loop to be read out is designated by the minor address assigned thereto and, after having been transferred to the major loop, the bit undergoes the read-out or write-in operation through the sensor at the location in the major loop designated by the major loop address. To this end, the address information including the chip address is constituted by three address fields. The accessing operation includes the first search operation at the minor loops on the basis of the minor loop addresses and the second search operation at the major loop with the aid of the major loop addresses after the completion of the first search operation and the corresponding bit transfer. The accessing operation to the magnetic bubble memory comprising bubble chips each constituted by minor and major loop arrangement as described above is apparently different from the accessing operation to the magnetic drum apparatus.
Next, description will be made on the read-out and/or write-in operations for a plurality of access requests by referring to FIG. 7. For the convenience of illustration, it is assumed that the magnetic bubble memory is constituted by four bubble chips No. 0, No. 1, No. 2 and No. 3, each of which includes minor and major memory loops in the arrangement such as shown in FIG. 6. Description on the restorage operation will be omitted. Further, it is to be mentioned that the illustration of the minor and major arrangements of the bubble chips in FIG. 7 is modified with a view to making clear the correspondence to the magnetic drum memory shown in FIG. 2. In FIG. 7, symbols No. 0 to No. 3 denote the magnetic bubble chips designated by corresponding addresses No. 0 to No. 3 and adapted to be rotated in the direction indicated by arrows 16 in synchronism with one another. The bubble chips No. 0 to No. 3 comprise, respectively the minor loops 20-0 to 20-3, the major loops 21-0 to 21-3, sensors 22-0 to 22-3 and gate positions 23-0 to 23-3.
Now, it is assumed that four access requests A, B, C and D are generated for the magnetic bubble memory shown in FIG. 7 and that the bit locations a, b, c and d are designated for the access requests A, B, C and D by the addressing information. As is in the case of the magnetic drum memory described hereinbefore in conjunction with FIG. 2, it is assumed that the access requests are re-arranged in the order of D, B, C and A in correspondence to the sequential order in which the memory locations a, b, c and d reach the positions of the associated sensors 22-0, 22-1, 22-2 and 22-3. In this connection, no difficulty will arise in such re-arrangement of the execution order of the access requests, since the time required for the memory locations or bubbles a, b, c and d to reach the associated sensors 22-0, 22-1, 22-2 and 22-3 can be easily determined and programmed by calculating the distances from the memory locations a, b, c and d to the associated sensors on the basis of the minor loop addresses and the major loop addresses allotted to these locations. Through the re-arrangement, the commands for the access requests A, B, C and D are in such a sequence as shown in FIG. 5.
Next, referring to a timing chart shown in FIG. 8, description will be made on the manner how the processing operations are performed for the access requests.
In the first place, the command for the access request D is executed. More specifically, the command CSL is executed and the address matching (or search operation) at the location d is conducted on the basis of the address information supplied as accompanying the command. Upon completed address matching, read-out operation is executed in accordance with the operation command, say the READ command in this case, which has been previously received, whereby the data transfer is performed for the access request D.
When the data transfer for the access request D has been completed, then the address matching at the location b is initiated in response to the reception of the command CSL for the access request B. It is assumed that the time t.sub.ds required for the bubble d to have been read out at the sensor 22-0 is greater than the time t.sub.bm required for the bubble or bit b to reach the gate position 23-2, that is t.sub.ds &gt;t.sub.bm. In such case, the bubble b will have passed by the gate position 23-2 when the magnetic bubble memory receives the command CSL for the access request B, as shown in FIG. 8, as the result of which the bubble b has to be moved along the associated minor loop for about one revolution before the bit b can be gated to the major loop 21-2. After such stand-by movement, the read-out operation of the bit b is executed for the access request B and then the processing for the access request A can be executed. It will be thus appreciated that the processing of four access requests requries extra time corresponding approximately to the time for a bubble to be moved along the whole length of the minor loop, involving the lowered efficiency. In the case of the above example, the timing relation between the access requests D and B is a cause for an undesirable increase in the processing time. However, such unfavorable timing relation may equally occur between the access requests B and C as well as between the access requests C and A. In any case, when a bit designated by the address information for an access request has just passed by the associated sensor at the completion of the processing for the preceding access request, a standby time corresponding approximately to the time required for the succeeding bit to reach again the associated sensor position after about one circulation in the minor loop.
As will be apparent from the above discussion, the procedure of determining the order of the access requests to be executed in dependence on the distances between the memory locations as addressed by the access commands and the associated sensors or head so that the processing of the access requests is executed sequentially starting from the addressed bit located nearest to the associted sensor or head is not effective for reducing the access time in the case of the magnetic bubble memory device due to unique address asignment, although the procedure is certainly very effective for shortening the access time in the case of the magnetic drum memory. Thus, difficulty is encountered in the attempt for reducing the effective access time of the magnetic bubble memory device thereby to increase the processing capability or efficiency of the magnetic bubble memory.